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About Me
Education - Ph. D. - Electrical and Computer Engineering, University of Utah, Salt Lake City, Utah, 2007 (expected).
- B. E. (Hons.) - Electrical and Electronics Engineering, Birla Institute of Technology and Science (BITS), Pilani, India, 2002.
Research As part of my thesis, I am working on the problem of equivalence verification of datapath-oriented designs. My research advisor is Dr. Priyank Kalla.
Publications Namrata Shekhar, Priyank Kalla, Brandon M. Meredith, Florian Enescu, “Simulation Bounds for Equivalence Verification of Polynomial Datapaths Using Finite Ring Algebra”, in review, IEEE Transactions on VLSI Systems: Special Section on Design Verification and Validation. - Namrata Shekhar, Priyank Kalla, Florian Enescu, “Equivalence Verification of Polynomial Datapaths using Ideal Membership Testing”, to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
- Namrata Shekhar, “Equivalence Verification of Arithmetic Datapaths using Finite Ring Algebra”, at the 9th SIGDA Ph.D. Forum at Design Automation Conference (DAC), 2006.
- Namrata Shekhar, Priyank Kalla, Brandon M. Meredith, Florian Enescu, “Simulation Bounds for Equivalence Verification of Arithmetic Datapaths with Finite Word-Length Operands”, in Formal Methods in Computer Aided Design (FMCAD), 2006. [ PDF ]
Namrata Shekhar, Priyank Kalla and Florian Enescu, "Equivalence Verification of Arithmetic Datapaths with Multiple Word-length Operands", in Design Automation and Test in Europe (DATE), 2006. [ PDF ]- Namrata Shekhar, Priyank Kalla, Florian Enescu and Sivaram Gopalakrishnan, "Equivalence Verification of Polynomial Datapaths with Fixed-size Bit-vectors using Finite Ring Algebra", in International Conference on Computer-Aided Design (ICCAD), 2005. [ PDF ]
- Namrata Shekhar, Priyank Kalla, Florian Enescu and Sivaram Gopalakrishnan, "Exploiting Vanishing Polynomials for Equivalence Verification of Fixed-size Arithmetic Datapaths", in International Conference on Computer Design (ICCD), 2005. [ PDF ]
Namrata Shekhar and Priyank Kalla, "An Intermediate Framework for Efficient Verification and Validation", in International Workshop on Logic and Synthesis (IWLS), 2003.
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